The present invention relates to a fuse apparatus for controlling a built-in self stress, and more particularly, to a fuse apparatus and a control method thereof, which can control whether a built-in self stress (BISS) unit is normally operated in a semiconductor memory device.
Generally, a test for a semiconductor memory device (hereinafter, referred to as a memory) requires a large amount of test patterns and control/watch for all the input/output pins of a memory. Accordingly, in a case where a memory is built into the integrated circuit, a test pattern implemented in hardware is built into an integrated circuit together with the memory because of a routing issue, limitation for the number of package pins, the length of a test program, etc.
A screen test is performed for early elimination of memory errors. In the screen test, testing the operation of a memory by applying high temperature/high pressure is called a stress built-in self test (BIST).
The BIST applies suitable voltages to a memory according to test modes, and thereafter measures patterns for the program state and erase state of the memory. Moreover, passing and failing in a corresponding test mode is determined by comparing patterns required in the program state and erase state of the memory with measurement patterns for a programmed state and an erased state according to the test modes.
To perform the BIST, external test equipment should provide various patterns of a test mode to the BIST. In this case, the built-in self stress is used as an apparatus for generating a stress test pattern for the test of a memory, and is built into a single chip together with a memory device.
In a case where a memory is tested by the BIST, a stress test pattern generated in the built-in self stress is used, and thus it is necessary to output and monitor whether the stress test pattern is normally generated in the built-in self stress.
However, when it is impossible to use an external output due to the environment in which equipment is provided, a user cannot check whether the operation of the built-in self stress is in a normal state.